Show the timing of this instruction sequence for the 5-stage RISC pipeline with full forwarding(or bypassing) hardware. Use a pipeline timing chart like that shown in the textbook Figure C.5.Assume that the branch is handled by predicting it as not taken and that the branch outcomesand targets are known (including the PC update) by the end of the decode stage. If all memoryreferences take 1 cycle, how many cycles does this loop take to execute? Justify your answer.

Consider the following statements: struct nametype{string first; string last; }; struct coursetype{string name; int callnum; int credits; char grade; }; struct studenttype{nametype name; double gpa; coursetype course; }; studenttype student; studenttype classlist[100]; coursetype course; nametype name; mark the following statements as valid or invalid. if a statement is invalid, explain why.a.) student.course.callnum = "csc230"; b.) cin > > student.name; c.) classlist[0] = name; d.) classlist[1].gpa = 3.45; e.) name = classlist[15].name; f.) student.name = name; g.) cout < < classlist[10] < < endl; h.) for (int j = 0; j < 100; j++)classlist[j].name = name; i.) classlist.course.credits = 3; j.) course = studenttype.course;