F(a, b, c, d, e) = (c + be′)(a + d′) G(a, b, c, d, e) = c + a′b′d + be′
a. Implement the functions using only two-input NAND gates and inverters in a multilevel circuit. Share any sub-expressions that you can when implementing the circuit.
b. Find the minimized two-level SOP expressions for F and G.
c. Implement the minimized SOP expressions using only two-input NAND gates and inverters. Share any sub-expressions that you can when implementing the circuit.
d. Compare your circuits (a) and (c) in terms of gate counts for NANDs and inverters. Briefly explain which circuit you would rather build.
For this problem, you may assume the both complemented and uncomplemented literal forms of the input variables are available. You need not show those inverters or include them in the gate count.
F and G represent separate functions that you want to implement simultaneously. You should still end up with two circuits, each of which has its own output.