You are designing a pmd and optimizing it for low energy. the core, including an 8 kb l1 data cache, consumes 1 w whenever it is not in hibernation. if the core has a perfect l1 cache hit rate, it achieves an average cpi of 1 for a given task, that is, 1000 cycles to execute 1000 instructions. each additional cycle accessing the l2 and beyond adds a stall cycle for the core. based on the following specifications, what is the size of l2 cache that achieves the lowest energy for the pmd (core, l1, l2, memory) for that given task?

Air is to be cooled in the evaporator section of a refrigerator by passing it over a bank of 0.8-cm-outer-diameter and 0.4-m-long tubes inside which the refrigerant is evaporating at -20°c. air approaches the tube bank in the normal direction at 0°c and 1 atm with a mean velocity of 4 m/s. the tubes are arranged in-line with longitudinal and transverse pitches of sl- st 1.5 cm. there are 30 rows in the flow direction with 15 tubes in each row. determine (a) the refrigeration capacity of this system and (b) pressure drop across the tube bank. evaluate the air properties at an assumed mean temperature of -5°c and 1 atm. is this a good assumption?