Assume that the pipelined processor is not using forwarding. Also, assume that register writes happen during the first half cycle and register reads happen during the next half cycle. Draw a pipeline diagram for the instruction sequence below, showing the flow of instructions through the pipeline during each clock cycle. Indicate any necessary stalls on the pipeline diagram. add $3, $2, $1lw $4, 8($3)sub $5, $3, $4lw $6, 12($3)sw $4, 20($5)bne $4, $6, 8

This program should be a short piece of code that prints all of the positive integers from 1 to 100 as described more fully below. the program may contain multiple methods, and if using an oo language, should be contained within a single class or object. the program should be designed so that it begins execution when invoked through whichever mechanism is most common for the implementation language. â–ş print out all positive integers from 1 to 100, inclusive and in order. â–ş print messages to standard output, matching the sample output below. â–ş in the output, state whether the each integer is 'odd' or 'even' in the output. â–ş if the number is divisible by three, instead of stating that the number is odd or even, state that the number is 'divisible by three'. â–ş if the number is divisible by both two and three, instead of saying that the number is odd, even or divisible by three; state that the number is 'divisible by two and three'. â–ş design the logic of the loop to be as efficient as possible, using the minimal number of operations to perform the required logic. sample output the number '1' is odd. the number '2' is even. the number '3' is divisible by three. the number '6' is divisible by two and three.