Computers and Technology, 20.05.2021 18:20 NeriyahY
A memory hierarchy is composed of an upper level and a lower level. Assume a CPU with 1ns clock cycle time. Data is requested by the processor. 8 out of 10 requests find the data in the upper level and return the data in 0.3ns. The remaining requests require 0.7 ns to return the data. Determine the corresponding values for the upper level memory.
Hit rate =
Miss rate =
Hit time =
Miss penalty =
AMAT =
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