This lab assignment requires you to design a shift register using D flip-flops and examine the function of a specific shift register TTL part. Cascade 4 DFFs according to lecture notes. Part A: Design a 4-bit synchronous left-shift register using D flip-flops. Your shift register should have an asynchronous parallel load, serial in, serial out, and parallel out bus. You may convert a flip-flop of another type into a D flip-flop, if needed. Note that your DFF has asynchronous clear (CLR) and preset (PR) for loading zero/one.
NOTE: FYI, you can (N)AND "clock" of each DFF with "asynchronous CLR/PR" to create synchronous CLR/PR. Do that for practice.

Arecipients list has been loaded into a document. which commands should be clicked in order to filter the list so that letters will not be printed for recipients who live in a certain state? mailings tab, start mail merge, select recipients, type new list, then insert only contacts from the desired states mailings tab, rules, select recipients, use existing list, then choose a recipients list that includes only contacts in certain states mailings tab, select recipients, use existing list, rules, fill in, then type in certain states mailings tab, rules, skip record select “state” under field name, then type in the state name under “equal to”

Anetwork security application that prevents access between a private and trusted network and other untrusted networks

When making changes to optimize part of a processor, it is often the case that speeding up one type of instruction comes at the cost of slowing down something else. for example, if we put in a complicated fast floating-point unit, that takes space, and something might have to be moved farther away from the middle to accommodate it, adding an extra cycle in delay to reach that unit. the basic amdahl's law equation does not take into account this trade-off. a. if the new fast floating-point unit speeds up floating-point operations by, on average, 2ă—, and floating-point operations take 20% of the original program's execution time, what is the overall speedup (ignoring the penalty to any other instructions)? b. now assume that speeding up the floating-point unit slowed down data cache accesses, resulting in a 1.5ă— slowdown (or 2/3 speedup). data cache accesses consume 10% of the execution time. what is the overall speedup now? c. after implementing the new floating-point operations, what percentage of execution time is spent on floating-point operations? what percentage is spent on data cache accesses?