Computers and Technology, 19.07.2020 01:01 Kalij13

For the problems in this exercise, assume that there are no pipeline stalls and that the breakdown of executed instructions is as follows: add addi not beq lw sw
20% 20% 0% 25% 25% 10%
a) In what fraction of all cycles is the data memory used?
b) In what fraction of all cycles is the input of the sign-extend circuit needed? What is this circuit doing in cycles in which its input is not needed?

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