Implement the 4-bit Carry Look Ahead (CLA) adder using any logic gates. a) Show the expression for all Carry outputs of the 4-bit CLA adder (C2, C3, C4) in terms of C0, G1, ..G3, P1, ..P3. b) Obtain the schematic for the CLA carry generator. The generator has inputs C0, G1, …G3, P1, ..,P3, and outputs C1 …C4. c) Estimate the CLA generator delay. Assume a 10 ns delay per logic gate regardless of the number of gate inputs. d) Show the 4 bit CLA adder schematic using the CLA generator as a building block and any logic gates. e) Estimate the propagation delay for the 4-bit adder utilizing the CLA carry generator block. Assume a 10 ns delay per logic gate.