When using NAND gate instead of NOR gate in SR flip-flop, Q and Q’ both become one when?

S and R both are 1
S and R both are 0
S=1 and R=0
S=0 and R=1
I don't feel like answering this question.

  S and R both are 0

Explanation:

A 0 at the input of a NAND gate causes its output to be 1. There is no other logic between the output NAND gate and the S or R inputs, so both inputs 0 will make both outputs 1.

the answer is d.

by: nicholas dooley

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