Consider two different implementations of the same instruction set architecture. The instructions can be divided into four classes according to their CPI (class A, B,C and D). P1 with a clock rate of 3GHz and CPIs of 3,2,1,4 and P2 with a clock rate of 2.5 GHz and CPIs of 2,2,2,2. Given a program with a dynamic instruction count of 1.0E5 instructions divided into classes as follows: 10% A, 30% class B, 40% class C, and 20% class ,D. Which implementation in faster? What is the global CPI for each implementation? Find the clock cycles required in both cases?