Assume all memory accesses are cache hit. 20% of the load instructions are followed by a dependent computational instruction, and 30% of the computational instructions are also followed by a dependent computational instruction. 20% of the branch instructions are unconditional, while 80% are conditional. 40% of the conditional branches are taken, 60% are not taken. the penalty for taking the branch is one cycle. if data forwarding is allowed, what is the instruction throughput for pipelined execution?

Read the following scenario, and then answer the question below. you want to send an e-mail to your boss requesting a meeting to discuss a raise. what is the best example of an e-mail to an employer about this meeting? “hey jason. can we chat about getting me more money soon? let me know. peace, meg.” “hello jason. pardon me for sending yet another e-mail today about my need to talk to you about my position and a possible pay increase. i am dying to know when you can talk. sincerely, meg.” “hello jason. i have been with the company for one year and have taken on more responsibilities than outlined in my job description. i would appreciate an opportunity to speak with you about my position. let me know when we can schedule a meeting. you, meg.” “greetings jason! i hope this e-mail finds you well and happy today. i really, really want to talk to you about something important. i am not sure if you have time. i hope you do. get back in touch with me and let me know when we might talk. ever so much for taking the time to read this. sincerely, meg.”