Problem statement: the predominant storage inside a computer systems are on disks drives. scsi disks arethe standard disks in most unix workstations from sun, hp, sgi, and other vendors. they are also the standard disks in macintoshes and higher-end intel pc's, especiallynetwork servers. consider the wide ultra4 scsi which transfers data packets in 16-bitbursts at 160 mhz with a maximum throughput of 320 mb/sec. the data transfers athigher rates can result in random-noise pulse changes from a 0 to 1 and 1 to a 0. as thespeed of processors and electronic communications increases, these parity flips becomemore prevalent and the inability to detect when these errors occur can be fatal. as adesign engineer you have been requested to create system for the transmission of these8-bit packets from an i/o controller to memory using error correcting code over 12-bitdata bus line. wide scsi contains a 68bit bus; however for the sake of simplification weare only concerned with the data bits. the other bits in the scsi bus are for busarbitration, synchronization, power management, etc. in this project, we will use evenparity. hex displays memory i/o controllertransmission vectored bit: a 4-bit parity vector (p1-p4) are interlaced with the 8-bitdata vector (d1: d8): p1 p2 d1 p3 d2 d3 d4 p4 d5 d6 d7 d81) create an ecc generator, at the i/o controller from the 8-bit data vector. the outputof the ecc generator will be the 4-bit parity vector. problem statement: the predominant storage i2) construct a 12-bit data transmission bus to send the binary data and parity bits overto memory.